Welcome to IEEE TCCA Email-Monthly, Jan. 2004: 1. HPCA-10: 10th International Symposium on High-Performance=20 Computer Architecture *Madrid, Spain, February 14-18, 2004,=20 *Call for Participation: http://www.ac.uma.es/hpca10/=20 2. ICPADS 2004: The Tenth International Conference on Parallel=20 and Distributed Systems *Newport Beach, California, July 7 - 9, 2004 *CALL FOR PAPERS: http://www.cacs.louisiana.edu/icpads2004 *Submission deadline: January 12, 2004 -submitted by: "Nian Tzeng" 3. ERSA'04: The 2004 International Conference on ENGINEERING OF=20 RECONFIGURABLE SYSTEMS AND ALGORITHMS=20 *Las Vegas, June 21--24, 2004 *Submission Deadline: February 9, 2004=20 -Submitted by: "Toomas Plaks" =20 -CALL FOR PAPERS: http://www.scism.lsbu.ac.uk/ERA/ersa.html ------- * Archive: http://www.ele.uri.edu/tcca * To submit an email message to be distributed among TCCA members,=20 send an email to qyang@ele.uri.edu * To subscribe to this mailing list, please sign up at * To unsubscribe yourself from this mailing list: email to tcca-request@ele.uri.edu with message body: unsubscribe=20 ----------------------------------------------------------------------- Qing (Ken) Yang, Professor =09 Distinguished Engineering Professor e-mail: qyang@ele.uri.edu =20 Dept. of Electr. & Comput. Engineering Tel. (401) 874-5880 =20 University of Rhode Island Fax (401) 782-6422 =20 Kingston RI. 02881 http://www.ele.uri.edu/~qyang = =20 ------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~Message Details~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Call for Participation HPCA-10 10th International Symposium on High-Performance Computer Architecture =20 Madrid, Spain February 14-18, 2004 =20 http://www.ac.uma.es/hpca10/ The International Symposium on High-Performance Computer Architecture provides a high quality forum for scientists and engineers to present their latest research findings in this rapidly changing field. Final program can be found at the end of this message and at: http://www.ac.uma.es/hpca10/program.html Information on workshops and tutorials is available at: http://www.csl.cornell.edu/~espeight/hpca10wkshps.html http://www.ac.uma.es/hpca10/tutorials.html Registration is now open. Early registration period ends Jan. 16, 2004. On-site registration may be required after Feb. 6, 2004. Please register following instructions at: http://www.ac.uma.es/hpca10/registration.html Hotel rooms are available at special rates for HPCA-10 conference attende= es in Madrid at several locations. Convenient transportation is available fr= om any of them to the conference site (UCM campus). For more details, please see: http://www.ac.uma.es/hpca10/hotel.html HPCA-10 conference and workshops will be held at Facultad de Informatica of the Universidad Complutense, in Madrid. For transportation details, please refer to: http://www.ac.uma.es/hpca10/travel.html Finally, to find out what you can see and do in Madrid, please visit: http://www.ac.uma.es/hpca10/madrid.html Happy new year and see you in Madrid! =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D FINAL PROGRAM =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --------------------- Saturday, February 14 --------------------- All-day Workshops =20 SAN-3: Third Annual Workshop on System Area Networks PPHEC-1: First Workshop on Productivity and Performance in High-End Compu= ting =20 Half-day Workshops =20 WEPA-1: First Workshop on Embedded Parallel Architectures (morning) NP-3: Third Workshop on Network Processors (afternoon) Tutorials =20 T-1: Advanced Processor Architectures and Verification Challenges, Sunil = Kakkar (8:30am - 12:00pm) T-2: Power-Aware Design for High-Performance Processors, Jose Gonzalez an= d Kevin Skadron (1:30pm - 5:00pm) =20 ------------------- Sunday, February 15 ------------------- All-day Workshops (8:00am - 5:00pm) =20 NP-3: Third Workshop on Network Processors CAECW-7: Seventh Workshop on Computer Architecture Evaluation using Comme= rcial Workloads INTERACT-8: Eighth Annual Workshop on Interaction between Compilers and C= omputer Architecture =20 Tutorial (8:30am - 12:00pm) =20 T-3: High-Performance Embedded Computing, Wayne Wolf =20 ------------------- Monday, February 16 ------------------- Welcome (8:15am - 8:30am) Keynote I (8:30am - 9:30am) Chair: Jos=E9 Duato Microarchitecture: Are we finally done? Yale Patt Break (9:30am - 10:00am) Session 1: Power Management (10:00am - 12:00n) Chair: Antonio Gonzalez Exploiting Prediction to Reduce Power on Buses Victor Wen, Mark Whitney, Yatish Patel and John Kubiatowicz The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multip= rocessors Jian Li, Jose F. Martinez and Michael C. Huang Program Counter Based Techniques for Dynamic Power Management Chris Gniady, Y. Charlie Hu and Yung-hsiang Lu Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Base= d dI/dt Characterization Russ Joseph, Zhigang Hu and Margaret Martonosi =20 Lunch (12:00n - 1:30pm) =20 Session 2: Processor Design I (1:30pm - 3:00pm) Chair: Oscar Plata Out-Of-Order Commit Processors Adrian Cristal, Daniel Ortega, Josep Llosa and Mateo Valero Stream Register Files with Indexed Access Nuwan Jayasena, Mattan Erez and William Dally Low-Complexity Distributed Issue Queue Jaume Abella and Antonio Gonzalez =20 Break (3:00pm - 3:30pm) =20 Session 3: Prefetching (3:30pm - 5:00pm) Chair: Anand Sivasubramaniam Hardware Support for Prescient Instruction Prefetch Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, and John P. Shen Data Cache Prefetching Using a Global History Buffer Kyle Nesbit and James Smith Processor Aware Anticipatory Prefetching in Loops Partha Tirumalai, Spiros Kalogeropulos, Yonghong Song, Mahadevan Raja= gopalan and Vikram Rao =20 Break (5:00pm - 5:15pm) =20 Panel Session (5:15pm - 7:00pm) Panel Moderator: Mazin Yousif Bridging the Research Gap between Academia and Industry Panelists: Bill Dally Yale Patt Justin Rattner Steve Scott Antonio Gonzalez =20 -------------------- Tuesday, February 17 -------------------- Keynote II (8:30am - 9:30am) Chair: Emilio L. Zapata Designing for the High End Steve Scott =20 Break (9:30am - 10:00am) =20 Session 4: I/O (10:00am - 12:00n) Chair: Timothy M. Pinkston Reducing Energy Consumption of Disk Storage Using Power-Aware Cache Manag= ement Qingbo Zhu, Francis David, Yuanyuan Zhou, Cristo Devaraj and Pei Cao Improving Disk Throughput in Data-Intensive Servers Enrique Carrera and Ricardo Bianchini Synthesizing Representative I/O Workloads for TPC-H Jianyong Zhang, Anand Sivasubramaniam, Hubertus Franke, Natarajan Gau= tam, Yanyong Zhang and Shailabh Nagar Architectural Characterization of TCP/IP Packet Processing on the Pentium= (r) M microprocessor Srihari Makineni and Ravi Iyer =20 Lunch (12:00n - 1:30pm) =20 Session 5: Caches & Memory I (1:30pm - 3:00pm) Chair: Josep Torrellas Signature Buffer: Bridging Performance Gap between Registers and Caches Lu Peng, Jih-Kwon Peir and Konrad Lai Organizing the Last Line of Defense before Hitting the Memory Wall for CM= Ps Chun Liu, Anand Sivasubramaniam and Mahmut Kandemir Exploiting the Cache Capacity of a Single-chip Multi-core Processor with = Execution Migration Pierre Michaud =20 EXCURSION AND BANQUET=20 ---------------------- Wednesday, February 18 ----------------------=20 Keynote III (8:30am - 9:30am) Chair: Yale Patt Kilo-instructions in-flight Processors Mateo Valero =20 Break (9:30am - 10:00am) =20 Session 6: Scheduling (10:00am - 12:00n) Chair: Emilio Luque Understanding Scheduling Replay Schemes Ilhyun Kim and Mikko Lipasti Creating Converged Trace Schedules Using String Matching Satish Narayanasamy, Yuanfang Hu, Suleyman Sair and Brad Calder Reducing the Scheduling Critical Cycle using Wakeup Prediction Todd Ehrhart and Sanjay Patel Exploring Wakeup-Free Instruction Scheduling Jie S. Hu, N. Vijaykrishnan and Mary Jane Irwin =20 Lunch (12:00n - 1:30pm) =20 Keynote IV (1:30pm - 2:30pm) Chair: Francisco Tirado POWER5 Architecture and Systems Balaram Sinharoy =20 Session 7: Processor Design II (2:30pm - 4:00pm) Chair: Jose Gonzalez A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithrea= ding Processors Ayose Falcon, Alex Ramirez and Mateo Valero Reducing Branch Misprediction Penalty via Selective Recovery Amit Gandhi, Haitham Akkary and Srikanth Srinivasan Using Perceptron-Based Branch Confidence Estimation for Speculation Contr= ol Haitham Akkary and Srikanth Srinivasan =20 Break (4:00pm - 4:30 pm) =20 Session 8: Caches & Memory II (4:30pm - 6:00pm) Chair: Manuel Prieto Accurate and Complexity-Effective Spatial Pattern Prediction Chi Chen, Se-Hyun Yang, Babak Falsafi and Andreas Moshovos Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses Mazen Kharbutli, Keith Irwin, Yan Solihin and Jaejin Lee Link-Time Path-Sensitive Memory Redundancy Elimination Manel Fernandez and Roger Espasa =20 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D END OF PROGRAM =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -------------------------------------------------------------------------= - -------------------------------------------------------------------------= =3D CALL FOR PAPERS ICPADS 2004 The Tenth International Conference on Parallel and Distributed Systems http://www.cacs.louisiana.edu/icpads2004 Newport Beach, California=3D20 July 7 - 9, 2004 Sponsored by IEEE Computer Society TCPP and TCDP PURPOSE AND SCOPE The 2004 International Conference on Parallel and Distributed Systems =3D (ICPADS 2004)=3D20 provides an international forum for scientists, engineers, and users to =3D exchange and=3D20 share their experiences, new ideas, and latest research results on all =3D aspects of=3D20 parallel and distributed systems. All accepted papers will appear in =3D the Proceedings=3D20 of ICPADS 2004, which is to be published by the IEEE Computer Society =3D Press. =3D20 Awards will be given to the best papers.=3D20 Topics of particular interest include, but are not limited to: - Parallel and Distributed Systems=3D20 - Parallel and Distributed Applications and Algorithms=3D20 - Distributed Operating Systems=3D20 - Grid and Peer-to-Peer Computing=3D20 - Cluster Computing - Communication and Networking Systems=3D20 - Wireless and Mobile Computing=3D20 - Internet Computing and Applications=3D20 - Security and Privacy=3D20 - Dependable Computing and Systems=3D20 - Real-Time Systems=3D20 - Performance Modeling and Evaluation=3D20 PAPER SUBMISSION Papers representing original, unpublished work are invited to be =3D submitted and will be=3D20 evaluated based on originality, significance, technical soundness, and =3D clarity of exposition.=3D20 Submitted papers are not to exceed 5000 words (25 double-spaced pages, =3D with the minimal=3D20 font size of 11), including figures and references. Please number each =3D page.=3D20 An abstract and 5-10 keywords should be included in each submission. =3D Submissions will be=3D20 handled via the conference web site at: http://www.cacs.louisiana.edu/icpads2004/submitpaper.htm=3D20 =3D20 IMPORTANT DATES Paper Submission: January 12, 2004 Author Notification: April 1, 2004 Final Manuscript: May 1, 2004 ORGANIZING & PROGRAM COMMITTEES General Chair Benjamin Wah, Univ. of Illinois, Urbana Champaign =3D20 Program Chair Nian F. Tzeng, Univ. of Louisiana, Lafayette =3D20 Program Vice-Chairs =3D20 Communication Networks & Systems Timothy M. Pinkston, Univ. of S. California=3D20 Distributed Systems & Applications Joseph Urban, Arizona State Univ.=3D20 Grid Computing Xiaodong Zhang, NSF and College of William & Mary=3D20 Parallel Systems and Applications David Lilja, Univ. of Minnesota=3D20 Wireless and Mobile Computing Jennifer Hou, Univ. of Illinois, Urbana Champaign =3D20 Workshops Chair Kwei-Jay Lin, Univ. of California, Irvine = =3D Awards Chair Laxmi Bhuyan, Univ. of California, =3D Riverside=3D20 Local Arrangements Chair Kane Kim, Univ. of California, Irvine=3D20 Publication Chair Xiao Su, San Jose State Univ.=3D20 Publicity Chair Makoto Takizawa, Tokyo Denki Univ., = =3D Japan=3D20 Registration Chair Philip Sheu, Univ. of California, =3D Irvine =3D20 Finance Chair Yi Shang, Univ. of Missouri at =3D Columbia=3D20 Designated TC Chairs Chita R. Das, Penn State Univ. David A. Bader, Univ of New = =3D Mexico=3D20 Steering Committee Chair Wen-Tsuen Chen, National Tsing Hua Univ., =3D Taiwan=3D20 FURTHER INFORMATION Please contact the program chair Prof. Nian F. Tzeng, Univ. of =3D Louisiana, Lafayette=3D20 (tzeng@cacs.louisiana.edu). -------------------------------------------------------------------------= =3D ---------------------------------- ------------------------------------------------------------------------ CALL FOR PAPERS The 2004 International Conference on ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS --- ERSA'04 http://www.scism.lsbu.ac.uk/ERA/ersa.html a part of The 2004 International MultiConference in Computer Science and Compute Engineering http://www.world-academy-of-science.org:8080/CSREA/ws/ June 21--24, 2004 Monte Carlo Resort, Las Vegas, Nevada, USA Introduction The recent years have shown a continuous interest in using=20 reconfigurable computing platform for the design of application-specific computer=20 systems. The advances in reconfigurable computing architecture, in algorithm implementation methods, and in automatic mapping methods of algorithms=20 into =20 hardware and processor spaces form together a new paradigm of computing=20 and programming that has often been called `Computing in Space and Time'. This conference focuses on the different approaches in engineering of reconfigurable systems and implementing of algorithms, including theory,=20 architecture, algorithms, design systems and applications that=20 demonstrate the benefits of reconfigurable computing. ** Multiconference Keynote Talk from ERSA Computer Architecture, the road ahead Prof. Michael Flynn, Stanford Univ., USA ** ERSA Keynote Talks (Preliminary) 1. Energy-efficient Computations on FPGAs Prof. Viktor K. Prasanna, Univ. of Southern California, USA =20 2. Compilation of High-level Languages for Reconfigurable Computing=20 Platform=20 Prof. Walid A. Najjar, Univ. of California, Riverside, USA=20 3. >>>>> Dr. Wayne Luk, Imperial College, UK ** General Topics 1. Theory - Synthesis, Mapping, Parallelization, Partitioning ... 2. Software - CAD, Languages, Compilers, Operating Systems ...=20 3. Hardware - Adaptive and Dynamic Hardware, Reconfigurable=20 Architectures ... 4. Applications - Wireless Communication, Software Radio, Smart Cameras=20 ... ** Sessions A number of Focus and Technical Sessions are planned to organize.=20 If you are interested in, please contact with ERSA Chairman Toomas Plaks (ersa@lsbu.ac.uk) Focus sessions (Preliminary List) -------------- 1. Reconfigurable Systems for Energy-efficient Mobile Systems Chairman: Gerard J.M. Smit, Univ. of Twente, The Netherland 2. Operating System Approaches for Reconfigurable Hardware Chairman: Marco Platzner, ETH, Zurich, Switzerland 3. Reconfigurable Supercomputing Chairman: Maya B. Gokhale, Los Alamos National Laboratory, USA =20 4. HW/SW Codesign for Reconfigurable Hardware Systems Chairman: Miriam Leeser, Northeastern Univ., USA Technical sessions (Preliminary List) ------------------ 1. CHAMELEON a reconfigurable platform for wireless multimedia terminals Chairman: Gerard J.M. Smit, Univ. of Twente, The Netherland ** Demos Interested parties should contact ERSA Chairman Toomas Plaks. ** Best Papers After the conference, authors of best papers will be invited to submit=20 an extended version for publication in a Special Issue of an International Journal (The Journal of Supercomputing, Kluwer). ** Important Dates ** Full papers (max 10 pages, IEEE format): February 9, 2004=20 ** Notification of acceptance: March 22, 2004 ** Camera-ready papers and registration: April 21, 2004 ** Conference: June 21--24, 2004 ** Submission Prospective authors are invited to submit a full paper that must be an original, unpublished work, not currently submitted for publication or for consideration elsewhere. Full details will be available on the ERSA Web-site: http://www.scism.lsbu.ac.uk/ERA/ersa.html ** Other Conferences of Interest Together with ERSA there will be other conferences of interest: *PDPTA - International Conference on Parallel and Distributed Processing=20 Techniques and Applications *CISST - International Conference on Imaging Science, Systems and Technology *ICWN - International Conference on Wireless Networks *CIC - International Conference on Communications in Computing *ESA - International Conference on Embedded Systems and Applications *VLSI - International Conference on VLSI *IC - International Conference on Internet Computing For more details about other conferences, visit the Web-site: The 2003 International MultiConference in Computer Science and Compute Engineering http://www.world-academy-of-science.org:8080/CSREA/ws/ ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ If you have any questions or problems, please do not hesitate to e-mail: ersa@lsbu.ac.uk or directly to conference chair Toomas Plaks: plakst@lsbu.ac.uk (postal address is given below). Conference Chairman Dr. Toomas P. Plaks email: plakst@lsbu.ac.uk BCIM London South Bank University 103 Borough Road London SE1 0AA United Kingdom General Co-Chair Prof. Cameron D. Patterson Virginia Tech., USA Industrial Co-Chair John Watson QuickSilver Tech., Inc., USA=20 Advisory Board Prof. Michael Flynn Stanford Univ., USA Prof. Reiner W. Hartenstein=20 Univ. of Kaiserslautern, Germany =20 Prof. Viktor K. Prasanna Univ. of Southern California, USA=20 Dr. Nick Tredennick=20 Gilder Technology Report, USA Steering Committee Peter Athanas, Virginia Tech., USA=20 Carl Ebeling, University of Washington, USA Hossam ElGindy, Univ. of New South Wales, Australia Wayne Luk, Imperial College, UK=20 Hartmut Schmeck, Univ. of Karlsruhe, Germany Lothar Thiele, ETH, Zurich, Switzerland ------------------------------------------------------------------------ -------------------------------------------------------------------------= - * To unsubscribe yourself from this mailing list: email to tcca-request@ele.uri.edu with message body: unsubscribe=20